A carregar...
Publicação
DRAFT: A Scanning Test Methodology for Dynamic and Partially Reconfigurable FPGAs
| Nome: | Descrição: | Tamanho: | Formato: | |
|---|---|---|---|---|
| 182.43 KB | Adobe PDF |
Orientador(es)
Resumo(s)
A new class of FPGAs that enable partial and dynamic
reconfiguration without disturbing system operation,
raised a new test challenge: how to assure a continuously
fault free operation, independently of the circuit present
after many reconfiguration processes.
A new on-line test method for those FPGAs is proposed,
based on a scanning methodology and in the reuse of the
IEEE 1149.1 Boundary Scan test infrastructure, already
widely employed for In-System Programming.
Descrição
Palavras-chave
FPGAs