Browsing by Author "Davis, Robert"
Now showing 1 - 4 of 4
Results Per Page
Sort Options
- An extensible framework for multicore response time analysisPublication . Davis, Robert; Altmeyer, Sebastian; Indrusiak, Leandro; Maiza, Claire; Nélis, Vincent; Reineke, JanIn this paper, we introduce a multicore response time analysis (MRTA) framework, which decouples response time analysis from a reliance on context-independent WCET values. Instead, the analysis formulates response times directly from the demands placed on different hardware resources. The MRTA framework is extensible to different multicore architectures, with a variety of arbitration policies for the common interconnects, and different types and arrangements of local memory. We instantiate the framework for single level local data and instruction memories (cache or scratchpads), for a variety of memory bus arbitration policies, including: Round-Robin, FIFO, Fixed-Priority, Processor-Priority, and TDMA, and account for DRAM refreshes. The MRTA framework provides a general approach to timing verification for multicore systems that is parametric in the hardware configuration and so can be used at the architectural design stage to compare the guaranteed levels of real-time performance that can be obtained with different hardware configurations. We use the framework in this way to evaluate the performance of multicore systems with a variety of different architectural components and policies. These results are then used to compose a predictable architecture, which is compared against a reference architecture designed for good average-case behaviour. This comparison shows that the predictable architecture has substantially better guaranteed real-time performance, with the precision of the analysis verified using cycle-accurate simulation.
- A Generic and Compositional Framework for Multicore Response Time AnalysisPublication . Altmeyer, Sebastian; Davis, Robert; Indrusiak, Leandro; Maiza, Claire; Nélis, Vincent; Reineke, JanIn this paper, we introduce a Multicore Response Time Analysis (MRTA) framework. This framework is extensible to different multicore architectures, with various types and arrangements of local memory, and different arbitration policies for the common interconnects. We instantiate the framework for single level local data and instruction memories (cache or scratchpads), for a variety of memory bus arbitration policies, including: Round-Robin, FIFO, Fixed-Priority, Processor-Priority, and TDMA, and account for DRAM refreshes. The MRTA framework provides a general approach to timing verification for multicore systems that is parametric in the hardware configuration and so can be used at the architectural design stage to compare the guaranteed levels of performance that can be obtained with different hardware configurations. The MRTA framework decouples response time analysis from a reliance on context independent WCET values. Instead, the analysis formulates response times directly from the demands on different hardware resources.
- Integrated Analysis of Cache Related Preemption Delays and Cache Persistence Reload OverheadsPublication . Rashid, Syed Aftab; Nelissen, Geo; Altmeyer, Sebastian; Davis, Robert; Tovar, EduardoSchedulability analysis for tasks running on micro- processors with cache memory is incomplete without a treat- ment of Cache Related Preemption Delays (CRPD) and Cache Persistence Reload Overheads (CPRO). State-of-the-art analyses compute CRPD and CPRO independently, which might result in counting the same overhead more than once. In this paper, we analyze the pessimism associated with the independent calculation of CRPD and CPRO in comparison to an integrated approach. We answer two main questions: (1) Is it beneficial to integrate the calculation of CRPD and CPRO? (2) When and to what extent can we gain in terms of schedu- lability by integrating the calculation of CRPD and CPRO? To achieve this, we (i) identify situations where considering CRPD and CPRO separately might result in overestimating the total memory overhead suffered by tasks, (ii) derive new analyses that integrate the calculation of CRPD and CPRO; and (iii) perform a thorough experimental evaluation using benchmarks to compare the performance of the integrated analysis against the separate calculation of CRPD and CPRO.
- Overhead-aware schedulability evaluation of semi-partitioned real-time schedulersPublication . Souto, Pedro; Baltarejo Sousa, Paulo; Davis, Robert; Bletsas, Konstantinos; Tovar, EduardoSchedulability analyses, while valuable in theo-retical research, cannot be used in practice to reason aboutthe timing behaviour of a real-time system without includingthe overheads induced by the implementation of the schedul-ing algorithm. In this paper, we provide an overhead-awareschedulability analysis based on demand bound functions fortwo hard real-time semi-partitioned algorithms, EDF-WM andC=D. This analysis is based on a novel implementation thatrelies on the use of a global clock to reduce the overheadsincurred due to the release jitter of migrating subtasks. Theanalysis is used to guide the respective off-line task assignmentand splitting procedures. Finally, results of an evaluation areprovided highlighting how the different algorithms performwith and without a consideration of overheads.