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A Generic and Compositional Framework for Multicore Response Time Analysis
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Orientador(es)
Resumo(s)
In this paper, we introduce a Multicore Response Time Analysis (MRTA) framework. This framework is extensible to
different multicore architectures, with various types and arrangements of local memory, and different arbitration
policies for the common interconnects. We instantiate the framework for single level local data and instruction
memories (cache or scratchpads), for a variety of memory bus arbitration policies, including: Round-Robin, FIFO,
Fixed-Priority, Processor-Priority, and TDMA, and account for DRAM refreshes. The MRTA framework provides a
general approach to timing verification for multicore systems that is parametric in the hardware configuration and
so can be used at the architectural design stage to compare the guaranteed levels of performance that can be
obtained with different hardware configurations. The MRTA framework decouples response time analysis from a
reliance on context independent WCET values. Instead, the analysis formulates response times directly from the
demands on different hardware resources.
Descrição
23rd International Conference on Real-Time Networks and Systems (RTNS 2015). 4 to 6, Nov, 2015, Main Track. Lille, France. Best Paper Award Nominee