Publication
Active Replication: Towards a Truly SRAM-based FPGA On-Line Concurrent Testing
| dc.contributor.author | Gericota, Manuel G. | |
| dc.contributor.author | Alves, Gustavo R. | |
| dc.contributor.author | Silva, Miguel L. | |
| dc.contributor.author | Ferreira, J. M. Martins | |
| dc.date.accessioned | 2017-03-29T09:30:17Z | |
| dc.date.embargo | 2117 | |
| dc.date.issued | 2002-07 | |
| dc.description.abstract | The reusing of the same hardware resources to implement speed-critical algorithms, without interrupting system operation, is one of the main reasons for the increasing use of reconfigurable computing platforms, employing complex SRAM-based FPGAs. However, new semiconductor manufacturing technologies increase the probability of lifetime operation failures, requiring new on-line testing / fault-tolerance methods able to improve the dependability of the systems where they are included. The Active Replication technique presented in this paper consists of a set of procedures that enables the implementation of a truly non-intrusive structural on-line concurrent testing approach, detecting and avoiding permanent faults and correcting errors due to transient faults. In relation to a previous technique proposed by the authors as part of the DRAFT FPGA concurrent test methodology, the Active Replication technique extends the range of circuits that can be replicated, by introducing a novel method with very low silicon overhead. | pt_PT |
| dc.description.version | info:eu-repo/semantics/publishedVersion | pt_PT |
| dc.identifier.doi | 10.1109/OLT.2002.1030201 | pt_PT |
| dc.identifier.uri | http://hdl.handle.net/10400.22/9724 | |
| dc.language.iso | eng | pt_PT |
| dc.publisher | Institute of Electrical and Electronics Engineers | pt_PT |
| dc.relation | POCTI/33842/ESE/2000 | pt_PT |
| dc.relation.ispartofseries | IOLTW’02; | |
| dc.relation.publisherversion | http://ieeexplore.ieee.org/document/1030201/ | pt_PT |
| dc.subject | FPGAs | pt_PT |
| dc.subject | Reconfigurable computing platforms | pt_PT |
| dc.subject | SRAM-based FPGA | pt_PT |
| dc.title | Active Replication: Towards a Truly SRAM-based FPGA On-Line Concurrent Testing | pt_PT |
| dc.type | journal article | |
| dspace.entity.type | Publication | |
| oaire.citation.conferencePlace | Ilha de Bendor, França | pt_PT |
| oaire.citation.title | IEEE Computer Society Press, Proceedings of the 8th IEEE International On-Line Testing Workshop (IOLTW’02) | pt_PT |
| person.familyName | Gericota | |
| person.familyName | Alves | |
| person.givenName | Manuel | |
| person.givenName | Gustavo | |
| person.identifier | 150015 | |
| person.identifier.ciencia-id | CE13-92FF-2097 | |
| person.identifier.ciencia-id | 4210-4DF2-5206 | |
| person.identifier.orcid | 0000-0001-9774-816X | |
| person.identifier.orcid | 0000-0002-1244-8502 | |
| person.identifier.rid | I-7876-2014 | |
| person.identifier.scopus-author-id | 7006053908 | |
| rcaap.rights | closedAccess | pt_PT |
| rcaap.type | article | pt_PT |
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| relation.isAuthorOfPublication | 01800568-7eaf-41d9-b78d-cf64f7c7381d | |
| relation.isAuthorOfPublication.latestForDiscovery | c84c77d9-ad89-48d1-9901-de8d5f7300b5 |