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Advisor(s)
Abstract(s)
The reusing of the same hardware resources to
implement speed-critical algorithms, without interrupting
system operation, is one of the main reasons for the
increasing use of reconfigurable computing platforms,
employing complex SRAM-based FPGAs. However, new
semiconductor manufacturing technologies increase the
probability of lifetime operation failures, requiring new
on-line testing / fault-tolerance methods able to improve
the dependability of the systems where they are included.
The Active Replication technique presented in this
paper consists of a set of procedures that enables the
implementation of a truly non-intrusive structural on-line
concurrent testing approach, detecting and avoiding
permanent faults and correcting errors due to transient
faults.
In relation to a previous technique proposed by the
authors as part of the DRAFT FPGA concurrent test
methodology, the Active Replication technique extends the
range of circuits that can be replicated, by introducing a
novel method with very low silicon overhead.
Description
Keywords
FPGAs Reconfigurable computing platforms SRAM-based FPGA
Citation
Publisher
Institute of Electrical and Electronics Engineers