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Advisor(s)
Abstract(s)
Dynamically reconfigurable systems based on partial
and dynamically reconfigurable FPGAs may have their
functionality partially modified at run-time without
stopping the operation of the whole system.
The efficient management of the logic space available
is one of the biggest problems faced by these systems.
When the sequence of reconfigurations to be performed is
not predictable, resource allocation decisions have to be
made on-line. A rearrangement may be necessary to get
enough contiguous space to implement incoming
functions, avoiding the spreading of their components and
the resulting degradation of system performance.
A new software tool that helps to handle the problems
posed by the consecutive reconfiguration of the same logic
space is presented in this paper. This tool uses a novel on-
-line rearrangement procedure to solve fragmentation
problems and to rearrange the logic space in a way
completely transparent to the applications currently
running.
Description
Keywords
FPGAs Reconfigurable systems Reconfigurable computing
Citation
Publisher
Institute of Electrical and Electronics Engineers