| Nome: | Descrição: | Tamanho: | Formato: | |
|---|---|---|---|---|
| 304.59 KB | Adobe PDF |
Orientador(es)
Resumo(s)
This paper proposes a genetic algorithm for designing combinational logic circuits and studies four different case examples: 2-to-1 multiplexer, one-bit full adder, four-bit parity checker and two-bit multiplier. The objective of this work is to generate a functional circuit with the minimum number of gates.
Descrição
Palavras-chave
Genetic algorithm Functional circuit
