Mixed-criticality scheduling with memory regulation

Awan, Ali; Bletsas, Konstantinos; Souto, Pedro; Åkesson, Benny; Tovar, Eduardo; Ali, Jibran

http://hdl.handle.net/10400.22/9515

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Authors

Awan, Ali

Bletsas, Konstantinos

Abstract(s)

The state-of-the-art models and schedulability analysis for mixed-criticality multicore systems overlook low-level aspects of the system. To improve their credibility, we therefore incorprate, in this work, the effects of delays from memory contention on a shared bus. Specifically, to that end, we adopt the predictable memory reservation mechanism proposed by the Single Core Equivalence framework. Additionally, we explore how the reclamation, for higher-criticality tasks, of cache resources allocated to lower-criticality tasks, whenever there is a criticality (mode) change in the system, can improve schedulability.