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Research Project
Embedded Multi-Core Systems for Mixed Criticality Applications in Dynamic and Changeable Real-Time Environments
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Publications
Cache-Persistence-Aware Response-Time Analysis for Fixed-Priority Preemptive Systems
Publication . Rashid, Syed Aftab; Nelissen, Geoffrey; Hardy, Damien; Åkesson, Benny; Puaut, Isabelle; Tovar, Eduardo
A task can be preempted by several jobs of higher priority tasks during its response time. Assuming the worst-case memory demand for each of these jobs leads to pessimistic worstcase response time (WCRT) estimations. Indeed, there is a big chance that a large portion of the instructions and data associated with the preempting task τj are still available in the cache when τj releases its next jobs. Accounting for this observation allows the pessimism of WCRT analysis to be significantly reduced, which is not considered by existing work. The four main contributions of this paper are: 1) The concept of persistent cache blocks is introduced in the context of WCRT analysis, which allows re-use of cache blocks to be captured, 2) A cache-persistence-aware WCRT analysis for fixed-priority preemptive systems exploiting the PCBs to reduce the WCRT bound, 3) An multi-set extension of the analysis that further improves the WCRT bound, and 4) An evaluation showing that our cache-persistence-aware WCRT analysis results in up to 10% higher schedulability than state-of-the-art approaches.
Contention-Free Execution of Automotive Applications on a Clustered Many-Core Platform
Publication . Becker, Matthias; Dasari, Dakshina; Nikolic, Borislav; Åkesson, Benny; Nelis, Vincent; Nolte, Thomas
Next generations of compute-intensive real-time applications in automotive systems will require more powerful computing platforms. One promising power-efficient solution for such applications is to use clustered many-core architectures. However, ensuring that real-time requirements are satisfied in the presence of contention in shared resources, such as memories, remains an open issue. This work presents a novel contention-free execution framework to execute automotive applications on such platforms. Privatization of memory banks together with defined access phases to shared memory resources is the backbone of the framework. An Integer Linear Programming (ILP) formulation is presented to find the optimal time-triggered schedule for the on-core execution as well as for the access to shared memory. Additionally a heuristic solution is presented that generates the schedule in a fraction of the time required by the ILP. Extensive evaluations show that the proposed heuristic performs only 0.5% away from the optimal solution while it outperforms a baseline heuristic by 67%. The applicability of the approach to industrially sized problems is demonstrated in a case study of a software for Engine Management Systems.
Energy Efficient Mapping of Mixed Criticality Applications on Unrelated Heterogeneous Multicore Platforms
Publication . Awan, Ali; Masson, Damien; Tovar, Eduardo
Heterogeneous multicore platforms are becoming an attractive choice to deploy mixed criticality systems demanding diverse computational requirements. One of the major challenges is to efficiently harness the computational power of these multicore platforms while deploying mixed criticality applications with timeliness properties. Energy efficiency is also one of the desired requirements in the design phase, and therefore it is often difficult for the system designer to simultaneously satisfy those sometimes contradictory requirements. In this paper, we propose a novel partitioning algorithm for unrelated heterogeneous multicore platforms to map mixed criticality applications. The algorithm not only ensures the timeliness in different modes of execution but also tries to allocate the applications to their energy-wise favourite cores. We considered a realistic power model that further increases the relevance of the proposed approach. We have performed an extensive set of experiments to evaluate the performance of the proposed approach, and we show that in the best-case, we achieve a 23.8% gain in the average power dissipation over the state-ofthe-art partitioned algorithm. Our proposed algorithm also has a better weighted schedulability when compared to the existing partitioned algorithms.
Mixed-Criticality Systems with Partial Lockdown and Cache Reclamation Upon Mode Change
Publication . Bletsas, Konstantinos; Awan, Muhammad Ali; Souto, Pedro; Åkesson, Benny; Tovar, Eduardo
In mixed-criticality multicore systems, the appropriate degree of isolation between applications of different criticalities is a primary objective. However, efficient utilization of the platform’s processing capacity and other resources is still desirable and important. In recent work, we, therefore, proposed an approach that reclaims cache resources assigned to low-criticality tasks when these are dispensed with, in the event of a system mode change. The reclaimed cache resources are reassigned from the lower-criticality tasks to the remaining higher-criticality tasks to improve performance. The per-task cache partitions can either be configured to hold frequently accessed (“hot”) pages, locked in place, or they can be used dynamically, with cache lines moved in and out. The first option simplifies WCET analysis while the second option simplifies the act of cache reconfiguration at runtime. Meanwhile, the performance implications of the two options are not immediately obvious. Therefore, in this work-in-progress, we explore an arrangement that combines both approaches, in order to achieve the best tradeoff between efficient analysis, low reconfiguration overheads and good schedulability Simple per task cache partitions (without page locking) are to be used for the portion of the cache that is subject to reclamation. At mode switch, the high-criticality tasks keep the pages they had locked in the cache and get additional partitions, out of reclaimed cache, to bring other pages in and out as needed.
Mixed-criticality Scheduling with Dynamic Redistribution of Shared Cache
Publication . Awan, Muhammad Ali; Bletsas, Konstantinos; Souto, Pedro; Åkesson, Benny; Tovar, Eduardo
The design of mixed-criticality systems often involves painful tradeoffs between safety guarantees
and performance. However, the use of more detailed architectural models in the design and
analysis of scheduling arrangements for mixed-criticality systems can provide greater confidence
in the analysis, but also opportunities for better performance. Motivated by this view, we propose
an extension of Vestal’s model for mixed-criticality multicore systems that (i) accounts for the
per-task partitioning of the last-level cache and (ii) supports the dynamic reassignment, for
better schedulability, of cache portions initially reserved for lower-criticality tasks to the highercriticality
tasks, when the system switches to high-criticality mode. To this model, we apply
partitioned EDF scheduling with Ekberg and Yi’s deadline-scaling technique. Our schedulability
analysis and scalefactor calculation is cognisant of the cache resources assigned to each task, by
using WCET estimates that take into account these resources. It is hence able to leverage the
dynamic reconfiguration of the cache partitioning, at mode change, for better performance, in
terms of provable schedulability. We also propose heuristics for partitioning the cache in lowand
high-criticality mode, that promote schedulability. Our experiments with synthetic task sets,
indicate tangible improvements in schedulability compared to a baseline cache-aware arrangement
where there is no redistribution of cache resources from low- to high-criticality tasks in the event
of a mode change.
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Funders
Funding agency
European Commission
Funding programme
FP7
Funding Award Number
621429