Hardware/Software Implementation Factors Influencing Ethernet Latency

Corrêa, Tomás P.; Almeida, Luis; Bueno Peña, Emilio

http://hdl.handle.net/10400.22/12302

Use this identifier to reference this record.

Name:	Description:	Size:	Format:
COM3_CISTER_2018.pdf		362.89 KB	Adobe PDF	Download

Send Feedback

Authors

Corrêa, Tomás P.

Almeida, Luis

Bueno Peña, Emilio

Abstract(s)

Minimum Cycle Time is a common performance indicator adopted to compare Real-Time Ethernet protocols. Though serving its purpose, Minimum Cycle Time excludes the delays inside the sending and receiving nodes, so it is insufficient to estimate the end-to-end latency. In this work, we describe some implementation possibilities of an Ethernet node in a System-on-Chip and present measurements of the delay to send/receive packets from/to the application layer. We chose different points in the software to make the measurement, so the results cover more use-cases. We found the Ethernet Lite Media Access Controller (MAC) to be faster than the hard MAC (GEM) and the Lightweight IP stack to add less than 2.2 μs. Finally, we show how a hardware accelerator can reduce the delay of high-priority packets by 1.4 μs.