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- A Built-In Mixed-signal Block Observer (BIMBO) to improve observability in 1149.4 environmentsPublication . Felgueiras, Carlos; Alves, Gustavo R.; Ferreira, Jose M.This document proposes an extension to the IEEE 1149.4 test infrastructure [1], whereby a bank of sigma-delta first order modulators enables the simultaneous observation of several analog pins in a single component. The modulator output bit streams are shifted out and made available to an external test controller that comprises the corresponding bank of decimation filters and other decision and control logic. The architecture proposed is fully non-intrusive and may be used to support debug and test operations in mixed-signal environments.
- Integrity checking of 1149.4 extensions to 1149.1Publication . Felgueiras, Carlos; Alves, Gustavo R.; Ferreira, José M.The IEEE 1149.4 Standard for a Mixed-Signal (MS) Test Bus proposes an extension to the well-accepted IEEE 1149.1 boundary-scan test architecture, with the objective of facilitating interconnect, parametric and internal testing of MS circuits. An Analog Test Access Port (ATAP) comprising two pins called AT1 and AT2, and an internal analog bus (AB) comprising two lines (AB1, AB2), enable analog test stimulae and responses to be routed to any pin possessing an Analog Boundary Module (ABMs replace the IEEE 1149.1 test cells in the case of analog pins). A Test Bus Interface Circuit (TBIC) comprising ten analog switches defines how the ATAP and the internal analog bus are (dis)connected, and the six analog switches in each ABM define what connections should be established between the pin, the core circuitry, and the internal analog bus. The large number of analog switches in the 1149.4 test architecture may raise concerns about their integrity, particularly when they are used frequently, as would be the case in an 1149.4-based MS debug strategy. This paper proposes a set of integrity check procedures that address only the 1149.4 extensions: ATAP, TBIC, AB lines, ABMs.
- Measurements in 1149.4 environments – correcting the infrastructure switches influencePublication . Felgueiras, Carlos; Alves, Gustavo R.; Ferreira, José M.Measuring the values of discrete components frequently takes place during the test or debug phase of Printed Circuit Boards (PCB). This operation requires tools that are based on some access type. The shrinking geometries constrain the straightforward use of tools based on physical access. One of the aims of the IEEE1149.4 Std. is to facilitate those on-board measurements. This infrastructure relies on electronic access that includes high quality analog buses and a set of electronic switches, which enable to completely isolate a component under characterization, e.g. by injecting a known current and measuring the voltage across it. During this process, the infrastructure switches have a negative impact in the measurement accuracy. This paper analyses the measurement of one resistor in two situations: connected between a pin and ground and between two pins. The infrastructure switches that affect the measurement quality are identified and the upper limit of its systematic error is characterized. When the systematic error is completely defined then it is possible to remove its negative effect from the final result.
- Debugging mixed-signal circuits via the IEEE1149.4 Std. – analysis of limitations and requirementsPublication . Felgueiras, Carlos; Alves, Gustavo R.; Ferreira, J. M. MartinsDebugging mixed-signal circuits is traditionally seen as a complex task due to the presence of an analog part and the necessary interaction with a digital part. The use of debug tools that require physical access suffers from the same restrictions that led to the use of debug tools based on electronic access to digital circuits. While the IEEE1149.4 test infrastructure enables the structural and parametric test of mixed-signal boards, through electronic access, its use for debug purposes is still far from reaching a wide acceptance, namely due to the lack of a debug methodology. This work analyses several access mechanisms for Controllability, Observability and Verification operations via the IEEE1149.4 infrastructure, with an emphasis on the analysis of its limitations and requirements.
- A built-in debugger for 1149.4 circuitsPublication . Felgueiras, Carlos; Alves, Gustavo R.; Ferreira, J. M. MartinsDebugging mixed-signal circuits is usually seen as a complex task due to the presence of an analog part and the necessary interaction with a digital part. The use of debug and test tools that require physical access suffers from the same restrictions that led to other solutions based on electronic access, especially for digital circuits, due to the increasing operating frequencies and miniaturization scales. This is particularly the case that led to the emergence and wide acceptance of the IEEE1149 family of test infrastructures, which relies on an electronic test access port. While the IEEE1149.4 test infrastructure enables the structural and parametric test of mixed-signal boards, its use is still far from reaching a wide acceptance, namely due to the lack of alternative applications, such as debugging, as it is the case in the 1149.1 domain. This work describes a way to support debug operations in 1149.4 mixed-signal circuits, in particular a built-in condition detection mechanism able to support internal watchpoint/breakpoint operations.
- Debugging mixed-signals circuits via IEEE1149.4 – a built-in mixed condition detectorPublication . Felgueiras, Carlos; Alves, Gustavo R.; Ferreira, J. M. MartinsDiagnosing design faults in a mixed-signals circuit is no trivial task, due to the inherent uncertainties associated with analog signals, not mentioning the interaction between the analog part and the digital part. Using debug and test tools is one way to deal with the problem, especially during the prototyping phase, however if a physical access is required then the same restrictions that led to other solutions, based on electronic access, apply. This is particularly the case that led to the emergence and wide acceptance of the IEEE1149 family of test infrastructures, which relies on an electronic test access port. While the IEEE1149.4 test infrastructure enables the structural and parametric test of mixed-signal boards, its use is still far from reaching a wide acceptance, namely due to the lack of alternative applications, such as debugging, as seen in the 1149.1 domain of purely digital circuits. Building upon the rationale that enabled transferring the structural test of board interconnections between analog pins, from the analog domain to the digital domain, using the mechanisms present in an Analog Boundary Module, as defined in the IEEE1149.4 Std., we propose a new way to support debug operations in 1149.4 mixed-signals circuits. In particular, we describe a built-in mechanism able to detect both internal and pin-level mixed-signal conditions, and hence able to support watchpoint/breakpoint operations at the IC level.
- Using test infrastructures for (remote) online evaluation of the sensitivity to SEUs of FPGAsPublication . Fidalgo, André Vaz; Alves, Gustavo R.; Felgueiras, Carlos; Gericota, Manuel G.This paper proposes an online mechanism that can evaluate the sensitivity of single event upsets (SEUs) of field programmable gate arrays (FPGAs). The online detection mechanism cyclically reads and compares the values form the external and internal configuration memories, taking into account the mask information. This remote detection method also signals any mismatch as a result of a SEU that affects both used and not-used FPGA parts, which maximizes the monitored area. By utilizing an external, Web-accessible controller that is connected to the test infrastructure, the possibility of running the same operation in a remote manner is enabled. Moreover, the need for a local memory to store the mask values is also eliminated.