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Publicação
Response time analysis of hard real-time tasks sharing software transactional memory data under fully partitioned scheduling
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Orientador(es)
Resumo(s)
Software transactional memory (STM) is a synchronisation paradigm which improves the parallelism and composability of modern applications executing on a multi-core architecture. However, to abort and retry a transaction multiple times may have a negative impact on the temporal characteristics of a real-time task set. This paper addresses this issue: It provides a framework in which an upper-bound on the worst-case response time of each task is derived, assuming that tasks are scheduled by following either the Non-Preemptive During Attempt (NPDA), Non-Preemptive Until Commit (NPUC) or Stack Resource Policy for Transactional Memory (SRPTM) policy.
Descrição
11th IEEE International Symposium on Industrial Embedded Systems (SIES 2016). 23 to 25, May, 2016. Krakow, Poland.
Palavras-chave
Real-time systems Time factors Multicore processing Parallel processing Synchronization Scheduling
Contexto Educativo
Citação
Editora
Institute of Electrical and Electronics Engineers