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Abstract(s)
Nos Ćŗltimos anos, tornou-se notĆ”vel o grande avanƧo na tecnologia, e com este surgiram novos equipamentos que tornaram a vida dos utilizadores mais facilitada. Cada equipamento teve uma evoluĆ§Ć£o progressiva, notando-se uma diminuiĆ§Ć£o dos componentes constituintes e cada equipamento, de forma a tornĆ”-lo mais leve, mais pequeno e com as mesmas funcionalidades. Com este avanƧo tecnolĆ³gico, a procura por equipamentos novos aumentou, fazendo com que empresas de desenvolvimento tornassem a produĆ§Ć£o mais rĆ”pida e eficaz. Para tal a realizaĆ§Ć£o de testes a lotes ou a equipamentos individuais, tornou-se um papel fundamental para que o equipamento fosse entregue ao cliente pronto para utilizaĆ§Ć£o. Sendo o encapsulamento dos componentes cada vez mais pequeno, a realizaĆ§Ć£o de testes em produtos finais comeƧou a tornar-se um problema, devido Ć dificuldade de acesso fĆsico a pontos estratĆ©gicos de teste. Para tal foram desenvolvidas infraestruturas normalizadas capazes de ajudar na depuraĆ§Ć£o de cada um dos equipamentos sem acesso direto aos pinos, das quais se pode destacar a norma IEEE1149.1 a nĆvel digital e a IEEE1149.4, sendo esta baseada na norma anterior, mas com extensĆ£o para o domĆnio dos circuitos analĆ³gicos e mistos.
Os dispositivos reconfigurĆ”veis tĆŖm tornado possĆvel a evoluĆ§Ć£o de equipamentos mais pequenos, permitindo criar diversos circuitos no seu interior atravĆ©s de programaĆ§Ć£o. Ao longo do tempo tem-se deparado que os dispositivos reconfigurĆ”veis tĆŖm evoluĆdo maioritariamente atravĆ©s da eletrĆ³nica com a utilizaĆ§Ć£o de Field-Programmable Gate Array (FPGA). O sucesso destes circuitos no domĆnio digital teve reflexo tambĆ©m no domĆnio analĆ³gico, os quais assumem especial importĆ¢ncia, sendo denominados por FieldProgrammable Analog Arrays (FPAAs). Presentemente os dispositivos FPGAās jĆ” incluem meios, frequentemente baseados na infraestrutura IEEE1149.1, que permitem a realizaĆ§Ć£o de um conjunto importante de operaƧƵes de depuraĆ§Ć£o do circuito. No entanto, as FPAAās, encontram-se desprovidas desses meios, estando as operaƧƵes de depuraĆ§Ć£o e/ou teste limitadas Ć s de acesso fĆsico aos pinos antes da respetiva introduĆ§Ć£o no circuito global. Ć apenas possĆvel realizar uma simulaĆ§Ć£o de forma a perceber o possĆvel estado do sistema, sendo necessĆ”rio o acesso direto aos pinos para validar que o sistema funciona tal como foi configurada. Dado que uma parte importante do sucesso da infraestrutura IEEE1149.1 se deveu Ć s suas caracterĆsticas notĆ”veis para apoiar operaƧƵes de depuraĆ§Ć£o em circuitos digitais, vale a pena analisar de que modo Ć© que a infraestrutura IEEE1149.4 poderĆ” apoiar as mesmas operaƧƵes no domĆnio analĆ³gico.
Desta forma, para criar um mecanismo de verificaĆ§Ć£o funcional, realiza-se a interligaĆ§Ć£o entre as FPAAās e os dispositivos que implementem a infraestrutura IEEE1149.4.
Para alargar o interesse pelo desenvolvimento de aplicaƧƵes com utilizaĆ§Ć£o de FPAAās, sem necessidade de utilizaĆ§Ć£o de uma placa de desenvolvimento, foram desenvolvidos meios de apoio ao ensino. Assim, a aproximaĆ§Ć£o do aluno ao projeto para configuraĆ§Ć£o de uma ou vĆ”rias FPAAās, com utilizaĆ§Ć£o de um microcontrolador externo, serĆ” mais facilitada.
No presente trabalho, desenvolve-se uma soluĆ§Ć£o capaz de tornar as FPAAās acessĆveis atravĆ©s de um Ćŗnico ponto para controlo e observaĆ§Ć£o do sistema, sem necessidade de acesso direto aos pinos, facilitando-se assim as tarefas de teste e/ou depuraĆ§Ć£o.
In the last years, it has become remarkable the great advance in technology, and with this one emerged new equipment that made life of users easier. Each equipment had a progressive evolution, noting a decrease of the components that constitute each equipment, in order to make it lighter, smaller and with the same features. With this technological advancement, the demand for new equipment increased, causing that development companies made production more fast and efficient. For such a testing of batches or individual equipment, it has become a major role so that the equipment was delivered to the customer ready for use. As the package of the components became smaller, making tests in final products started becoming a problem, due to difficulty of access to strategic points of test. For such standard infrastructure were developed, capable of helping in the debugging of each of the equipment without direct access to pinout, of which we can highlight the norm IEEE1149.1 in digital level and the IEEE1149.4, being this one based on the previous norm, but extending to the domain of the analog and mixed circuits. Reconfigurable devices are making possible the evolution of smaller devices, allowing to create several circuits inside each one by programming. Over time it has noted that reconfigurable devices have evolved mainly through the electronics with the use of FieldProgrammable Gate Array (FPGA). The success of these circuits in the digital domain was also reflected in the analog domain which takes special importance, being called by FieldProgrammable Analog Arrays (FPAA). Nowadays the FPGAās devices already include means, often based on IEEE1149.4 infrastructure, that allow the realization of an important set of circuit debugging operations. However, the FPAAās are devoid of such means, being the debug operations and/or test limited to physical access to pinout before the introduction into the global circuit. Is possible only to carry out a simulation in order to understand the possible system state, requiring direct access to pinout to validate that the system works as it was configured. As an important part of the success of IEEE1149.1 infrastructure was due to its notable features to support debug operations in digital circuits, it is worth examining how is that IEEE1149.4 infrastructure may support the same operations in the analog domain. So, to create a functional verification mechanism, is carried out the interconnection between the FPAA's and devices that implement the IEEE1149.4 infrastructure. To extend the interest in developing applications with use of FPAA's, without need to use a development board, means have been developed to support education. So, the approach of the student to the project to configure one or several FPAA's, using an external microcontroller, will be facilitated. In the present work, it is developed a solution capable of making the FPAAās accessible through a single point for control and observation of the system, without the need of direct access to pinout, thereby facilitating the test task and/or debugging.
In the last years, it has become remarkable the great advance in technology, and with this one emerged new equipment that made life of users easier. Each equipment had a progressive evolution, noting a decrease of the components that constitute each equipment, in order to make it lighter, smaller and with the same features. With this technological advancement, the demand for new equipment increased, causing that development companies made production more fast and efficient. For such a testing of batches or individual equipment, it has become a major role so that the equipment was delivered to the customer ready for use. As the package of the components became smaller, making tests in final products started becoming a problem, due to difficulty of access to strategic points of test. For such standard infrastructure were developed, capable of helping in the debugging of each of the equipment without direct access to pinout, of which we can highlight the norm IEEE1149.1 in digital level and the IEEE1149.4, being this one based on the previous norm, but extending to the domain of the analog and mixed circuits. Reconfigurable devices are making possible the evolution of smaller devices, allowing to create several circuits inside each one by programming. Over time it has noted that reconfigurable devices have evolved mainly through the electronics with the use of FieldProgrammable Gate Array (FPGA). The success of these circuits in the digital domain was also reflected in the analog domain which takes special importance, being called by FieldProgrammable Analog Arrays (FPAA). Nowadays the FPGAās devices already include means, often based on IEEE1149.4 infrastructure, that allow the realization of an important set of circuit debugging operations. However, the FPAAās are devoid of such means, being the debug operations and/or test limited to physical access to pinout before the introduction into the global circuit. Is possible only to carry out a simulation in order to understand the possible system state, requiring direct access to pinout to validate that the system works as it was configured. As an important part of the success of IEEE1149.1 infrastructure was due to its notable features to support debug operations in digital circuits, it is worth examining how is that IEEE1149.4 infrastructure may support the same operations in the analog domain. So, to create a functional verification mechanism, is carried out the interconnection between the FPAA's and devices that implement the IEEE1149.4 infrastructure. To extend the interest in developing applications with use of FPAA's, without need to use a development board, means have been developed to support education. So, the approach of the student to the project to configure one or several FPAA's, using an external microcontroller, will be facilitated. In the present work, it is developed a solution capable of making the FPAAās accessible through a single point for control and observation of the system, without the need of direct access to pinout, thereby facilitating the test task and/or debugging.
Description
Keywords
Teste DepuraĆ§Ć£o analĆ³gica VerificaĆ§Ć£o funcional analĆ³gica IEEE1149.1 IEEE1149.4 FPGA FPAA Test Analogic debugging Analog functional Verification