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AR2T: Implementing a Truly SRAM-based FPGA On-Line Concurrent Testing
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Orientador(es)
Resumo(s)
The new partial and dynamic reconfigurable features
offered by new generations of SRAM-based FPGAs may
be used to improve the dependability of reconfigurable
hardware platforms through the implementation of on-line
concurrent testing / fault-tolerance mechanisms.
However, such mechanisms call for the development of
new test strategies that do not interfere with the current
system functionality.
The AR2T (Active Replication and Release for Testing)
technique is a set of procedures that enables the
implementation of a truly non-intrusive structural on-line
concurrent testing approach, detecting and avoiding
permanent faults and correcting errors due to transient
faults. The experimental results presented prove the
effectiveness of these solutions.
In relation to a previous technique proposed by the
authors as part of the DRAFT FPGA concurrent test
methodology, AR2T extends the range of circuits that can
be replicated, by introducing a small replication aid
block.
Descrição
Palavras-chave
FPGAs Reconfigurable platforms SRAM-based