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A Novel Methodology for the Concurrent Test of Partial and Dynamically Reconfigurable SRAM-based FPGAs
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Orientador(es)
Resumo(s)
This poster presents the first truly non-intrusive
structural concurrent test approach, aimed to test partial
and dynamically reconfigurable SRAM-based FPGAs
without disturbing its operation. This is accomplished by
using a new methodology to carry out the replication of
active Configurable Logic Blocks (CLBs), i.e. CLBs that
are part of an implemented function that is actually being
used by the system, releasing it to be tested in a way that is
completely transparent to the system.
Descrição
Palavras-chave
FPGAs Configurable Logic Blocks (CLBs)