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Advisor(s)
Abstract(s)
The use of partial and dynamically reconfigurable
FPGAs in reconfigurable systems opens exciting
possibilities, since they enable the concurrent
reconfiguration of part of the system without
interrupting its operation. Nevertheless, larger dies
and the use of smaller submicron scales in the
manufacturing of this new kind of FPGAs increase
the probability of failures after many reconfiguration
processes. New methods of test and fault tolerance
are therefore required, capable of ensuring system
reliability.
This paper presents improvements to our RaT Freed
Resources technique, originally present in [1], a
structural concurrent test approach able to detect and
diagnosis faults without disturbing system operation,
throughout its lifetime.
Description
Keywords
FPGAs