| dc.contributor.author | Rashid, Syed Aftab | |
| dc.date.accessioned | 2018-11-29T16:51:48Z | |
| dc.date.available | 2018-11-29T16:51:48Z | |
| dc.date.issued | 2018 | |
| dc.description | CPS Student Forum Portugal was held as part of the Cyber-Physical Systems Week (CPS Week 2018), 10-13 April, Porto-Portugal. | pt_PT |
| dc.description.abstract | We intend to provide solutions that can be used to quantify and analyze the non-determinism arising from the sharing of two main resources in MCPs, i.e., caches and interconnects. • Accurately quantify the cache related contention in single core platforms. • Bounding the interference due to cache hierarchy and last-level shared cache (LLC) in multicore platforms. • Model the inter-core interference due to the sharing of Bus/interconnects in a MCP. • Develop a new timing analysis taking into account the interference caused by both caches and interconnects and their impact on the timing properties of tasks running on MCPs | pt_PT |
| dc.description.version | info:eu-repo/semantics/publishedVersion | pt_PT |
| dc.identifier.uri | http://hdl.handle.net/10400.22/12318 | |
| dc.language.iso | eng | pt_PT |
| dc.title | Towards Timing Analysis of Multi-core Platforms for Hard Real-Time Systems | pt_PT |
| dc.type | other | |
| dspace.entity.type | Publication | |
| oaire.citation.conferencePlace | Porto, Portugal | pt_PT |
| oaire.citation.title | CPS Student Forum Portugal | pt_PT |
| rcaap.rights | openAccess | pt_PT |
| rcaap.type | other | pt_PT |
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