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Buffer-aware bounds to multi-point progressive blocking in priority-preemptive NoCs
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Orientador(es)
Resumo(s)
This paper aims to reduce the pessimism of the
analysis of the multi-point progressive blocking (MPB) problem
in real-time priority-preemptive wormhole networks-on-chip. It
shows that the amount of buffering on each network node can
influence the worst-case interference that packets can suffer
along their routes, and it proposes a novel analytical model that
can quantify such interference as a function of the buffer size.
It shows that, perhaps counter-intuitively, smaller buffers can
result in lower upper-bounds on interference and thus improved
schedulability. Didactic examples and large-scale experiments
provide evidence of the strength of the proposed approach.
Descrição
Palavras-chave
Network routing Network-on-chip Processor scheduling Scheduling
Contexto Educativo
Citação
Editora
Institute of Electrical and Electronics Engineers