Repository logo
 
Publication

Run-time defragmentation for dynamically reconfigurable hardware

2005Book part Restricted access
Simple item page
dc.contributor.authorGericota, Manuel G.
dc.contributor.authorAlves, Gustavo R.
dc.contributor.authorSilva, Miguel L.
dc.contributor.authorFerreira, José M.
dc.date.accessioned2014-09-23T08:45:53Z
dc.date.available2014-09-23T08:45:53Z
dc.date.issued2005
dc.description.abstractReconfigurable computing experienced a considerable expansion in the last few years, due in part to the fast run-time partial reconfiguration features offered by recent SRAM-based Field Programmable Gate Arrays (FPGAs), which allowed the implementation in real-time of dynamic resource allocation strategies, with multiple independent functions from different applications sharing the same logic resources in the space and temporal domains. However, when the sequence of reconfigurations to be performed is not predictable, the efficient management of the logic space available becomes the greatest challenge posed to these systems. Resource allocation decisions have to be made concurrently with system operation, taking into account function priorities and optimizing the space currently available. As a consequence of the unpredictability of this allocation procedure, the logic space becomes fragmented, with many small areas of free resources failing to satisfy most requests and so remaining unused. A rearrangement of the currently running functions is therefore necessary, so as to obtain enough contiguous space to implement incoming functions, avoiding the spreading of their components and the resulting degradation of system performance. A novel active relocation procedure for Configurable Logic Blocks (CLBs) is herein presented, able to carry out online rearrangements, defragmenting the available FPGA resources without disturbing functions currently running.por
dc.description.sponsorshipFundação para a Ciência e Tecnologiapor
dc.identifier.doi10.1007/1-4020-3128-9_10
dc.identifier.isbn978-1-4020-3127-4
dc.identifier.isbn978-1-4020-3128-1
dc.identifier.urihttp://hdl.handle.net/10400.22/4978
dc.language.isoengpor
dc.peerreviewedyespor
dc.publisherSpringerpor
dc.relationPOCTI/ 33842/ESE/2000por
dc.relation.ispartofseriesNew Algorithms, Architectures and Applications for Reconfigurable Computing;Cap. 10
dc.relation.publisherversionhttp://link.springer.com/chapter/10.1007%2F1-4020-3128-9_10por
dc.subjectReconfigurable computingpor
dc.subjectPartial and dynamic reconfigurationpor
dc.subjectActive functionpor
dc.subjectDynamic relocationpor
dc.subjectFragmentationpor
dc.subjectDefragmentationpor
dc.titleRun-time defragmentation for dynamically reconfigurable hardwarepor
dc.typebook part
dspace.entity.typePublication
oaire.citation.endPage129por
oaire.citation.startPage117por
oaire.citation.titleNew Algorithms, Architectures and Applications for Reconfigurable Computingpor
oaire.citation.volumeCap. 10por
person.familyNameGericota
person.familyNameAlves
person.givenNameManuel
person.givenNameGustavo
person.identifier150015
person.identifier.ciencia-idCE13-92FF-2097
person.identifier.ciencia-id4210-4DF2-5206
person.identifier.orcid0000-0001-9774-816X
person.identifier.orcid0000-0002-1244-8502
person.identifier.ridI-7876-2014
person.identifier.scopus-author-id7006053908
rcaap.rightsclosedAccesspor
rcaap.typebookPartpor
relation.isAuthorOfPublicationc84c77d9-ad89-48d1-9901-de8d5f7300b5
relation.isAuthorOfPublication01800568-7eaf-41d9-b78d-cf64f7c7381d
relation.isAuthorOfPublication.latestForDiscovery01800568-7eaf-41d9-b78d-cf64f7c7381d

Files

Original bundle
Now showing 1 - 1 of 1
No Thumbnail Available
Name:
CAPL_ManuelGericota_2005_CIETI.pdf
Size:
157.64 KB
Format:
Adobe Portable Document Format
Download
License bundle
Now showing 1 - 1 of 1
No Thumbnail Available
Name:
license.txt
Size:
1.71 KB
Format:
Item-specific license agreed upon to submission
Description:
Download

Collections

ISEP – CIETI – Livro, parte de livro, ou capítulo de livro