| Name: | Description: | Size: | Format: | |
|---|---|---|---|---|
| 157.64 KB | Adobe PDF |
Advisor(s)
Abstract(s)
Reconfigurable computing experienced a considerable expansion in the last few
years, due in part to the fast run-time partial reconfiguration features offered by
recent SRAM-based Field Programmable Gate Arrays (FPGAs), which allowed
the implementation in real-time of dynamic resource allocation strategies, with
multiple independent functions from different applications sharing the same logic
resources in the space and temporal domains.
However, when the sequence of reconfigurations to be performed is not predictable,
the efficient management of the logic space available becomes the
greatest challenge posed to these systems. Resource allocation decisions have
to be made concurrently with system operation, taking into account function
priorities and optimizing the space currently available. As a consequence of the unpredictability of this allocation procedure, the logic space becomes fragmented,
with many small areas of free resources failing to satisfy most requests and so
remaining unused.
A rearrangement of the currently running functions is therefore necessary, so
as to obtain enough contiguous space to implement incoming functions, avoiding
the spreading of their components and the resulting degradation of system
performance. A novel active relocation procedure for Configurable Logic Blocks
(CLBs) is herein presented, able to carry out online rearrangements, defragmenting
the available FPGA resources without disturbing functions currently running.
Description
Keywords
Reconfigurable computing Partial and dynamic reconfiguration Active function Dynamic relocation Fragmentation Defragmentation
Pedagogical Context
Citation
Publisher
Springer