Repository logo
 
No Thumbnail Available
Publication

Work-In-Progress: WCRT Analysis for the 3-Phase Task Model in Partitioned Scheduling

Use this identifier to reference this record.
Name:Description:Size:Format: 
COM_CISTER_2020.pdf686.35 KBAdobe PDF Download

Advisor(s)

Abstract(s)

Multicore platforms are being increasingly adopted in Cyber-Physical Systems (CPS) due to their advantages over single-core processors, such as raw computing power and energy efficiency. Typically, multicore platforms use a shared system bus that connects the cores to the memory hierarchy (including caches and main memory). However, such hierarchy causes tasks running on different cores to compete for access to the shared system bus whenever data reads or writes need to be made. Such competition is problematic as it may cause large variations in the execution time of tasks in a non-deterministic way. This paper presents an analysis that allows one to derive bus contention-aware worst-case response-time of tasks that follow the 3-phase task model executing under partitioned scheduling.

Description

Keywords

Analytical models Program processors Multicore processing Cyber-physical systems Real-time systems Energy efficiency Task analysis

Citation

J. Arora, C. Maia, S. A. Rashid, G. Nelissen and E. Tovar, "Work-In-Progress: WCRT Analysis for the 3-Phase Task Model in Partitioned Scheduling," 2020 IEEE Real-Time Systems Symposium (RTSS), Houston, TX, USA, 2020, pp. 407-410, doi: 10.1109/RTSS49844.2020.00050.

Research Projects

Organizational Units

Journal Issue

Publisher

Institute of Electrical and Electronics Engineers

CC License

Altmetrics