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WCET analysis considering contention on memory bus in COTS-based multicores

dc.contributor.authorDasari, Dakshina
dc.contributor.authorNélis, Vincent
dc.contributor.authorAndersson, Björn
dc.date.accessioned2014-02-06T14:59:01Z
dc.date.available2014-02-06T14:59:01Z
dc.date.issued2011
dc.description.abstractThe usage of COTS-based multicores is becoming widespread in the field of embedded systems. Providing realtime guarantees at design-time is a pre-requisite to deploy real-time systems on these multicores. This necessitates the consideration of the impact of the contention due to shared low-level hardware resources on the Worst-Case Execution Time (WCET) of the tasks. As a step towards this aim, this paper first identifies the different factors that make the WCET analysis a challenging problem in a typical COTS-based multicore system. Then, we propose and prove, a mathematically correct method to determine tight upper bounds on the WCET of the tasks, when they are co-scheduled on different cores.por
dc.identifier.doi10.1109/ETFA.2011.6059176pt_PT
dc.identifier.isbn978-1-4577-0016-3
dc.identifier.isbn978-1-4577-0017-0
dc.identifier.issn1946-0740
dc.identifier.urihttp://hdl.handle.net/10400.22/3743
dc.language.isoengpor
dc.peerreviewedyespor
dc.publisherIEEEpor
dc.relation.ispartofseriesEmerging Technologies & Factory Automation (ETFA);
dc.relation.publisherversionhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6059176por
dc.titleWCET analysis considering contention on memory bus in COTS-based multicorespor
dc.typejournal article
dspace.entity.typePublication
oaire.citation.conferencePlaceToulousepor
oaire.citation.endPage4por
oaire.citation.startPage1por
oaire.citation.titleIEEE 16th Conference on Emerging Technologies & Factory Automation (ETFA) 2011por
rcaap.rightsclosedAccesspor
rcaap.typearticlepor

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