Publication
Scalable, energy-aware system modeling and application-specific reconfiguration of MPSocs with a type-2 fuzzy logic system
| dc.contributor.author | Hussain, Ishfaq | |
| dc.contributor.author | Ali Murtza, Shahid | |
| dc.contributor.author | Yasir Qadri, Muhammad | |
| dc.contributor.author | Fleury, Martin | |
| dc.contributor.author | N. Qadri, Nadia | |
| dc.date.accessioned | 2020-10-30T10:44:10Z | |
| dc.date.embargo | 2120 | |
| dc.date.issued | 2019 | |
| dc.description.abstract | This paper demonstrates that interval type-2 Fuzzy Logic Systems (FLS’s) are suited to Multiprocessor System-on-a-Chip (MPSoC) design modeling because of their ability to handle the uncertainty associated with input parameters. This makes for a scalable modeling process, whereas prior usage of type-1 FLS’s for modeling inhibited scalability. Specifically, the paper proposes a type-2 Takagi Sugeno Kang (TSK) FLS for modeling MPSoCs built around a multicore processor with shared memory. The paper also presents a TSK FLS reconfiguration methodology in order to dynamically reduce the energy consumption of such a multiprocessor. Modeling of MPSoC’s by means of the type-2 TSK FLS was found to be effective in terms of a reduction in the Energy Delay Product when applied to five large-scale numerical processing applications on an MPSoC. In fact, experimental results show a significant reduction (by 87–93% across the applications) in the energy consumption of an MPSoC. | pt_PT |
| dc.description.version | info:eu-repo/semantics/publishedVersion | pt_PT |
| dc.identifier.doi | 10.1016/j.compeleceng.2019.01.015 | pt_PT |
| dc.identifier.issn | 0045-7906 | |
| dc.identifier.uri | http://hdl.handle.net/10400.22/16380 | |
| dc.language.iso | eng | pt_PT |
| dc.peerreviewed | yes | pt_PT |
| dc.publisher | Elsevier | pt_PT |
| dc.relation.publisherversion | https://www.sciencedirect.com/science/article/pii/S0045790617336340?via%3Dihub#aep-article-footnote-id1 | pt_PT |
| dc.subject | Design space exploration | pt_PT |
| dc.subject | Multiprocessor System-on-a-Chip | pt_PT |
| dc.subject | Multicore processor | pt_PT |
| dc.subject | Type 2 Fuzzy Logic System | pt_PT |
| dc.subject | Reconfiguration | pt_PT |
| dc.title | Scalable, energy-aware system modeling and application-specific reconfiguration of MPSocs with a type-2 fuzzy logic system | pt_PT |
| dc.type | journal article | |
| dspace.entity.type | Publication | |
| oaire.citation.endPage | 304 | pt_PT |
| oaire.citation.startPage | 292 | pt_PT |
| oaire.citation.title | Computers & Electrical Engineering | pt_PT |
| oaire.citation.volume | 74 | pt_PT |
| rcaap.rights | closedAccess | pt_PT |
| rcaap.type | article | pt_PT |
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