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Abstract(s)
Para transmitir num ecrã uma imagem fluída e nítida, é necessário processar e tratar a informação captada por um sensor de imagem, dado ser informação analógica, e enviar para um host processor. De modo a processar essa informação é necessário um circuito que efetue a interface com extrema eficácia e eficiência. Esse circuito denomina-se um IP da plataforma MIPI, Mobile Industry Processor Interface. Um IP é um bloco de lógica, ou layout de um circuito, que pode ser reutilizável. Com o aumento exponencial da tecnologia, com o aumento da complexidade dos sistemas que possuem uma câmara, as dificuldades e desafios de implementação são cada vez mais acrescidos. Pretende-se que os IPs ocupem o menor espaço possível,
isto é, que seja possível reduzir o nó tecnológico e consequentemente o tamanho do circuito, que funcionem a frequências maiores, que o seu consumo e performance sejam o melhor possível. Neste relatório são abordadas todas as fases da implementação física de um IP da plataforma MIPI e o desenvolvimento de um novo workFlow/metodologia de desenvolvimento com recurso a uma ferramenta da Synopsys que possuí inteligência artificial, o DSO.ai. É comparado o desenvolvimento de um IP de 3nm C-PHY com recurso à metodologia usada atualmente, com a nova metodologia que incorpora o DSO.ai de modo a avaliar se a incorporação da nova ferramenta na implementação física de um IP MIPI é positiva.
To achieve a clear and fluid image on a screen, the analogue information captured by an image sensor is processed and transmitted to a host processor. An extremely effective and efficient interface circuit is required to process the data. This circuit is called an IP from the MIPI platform (Mobile Industry Processor Interface). An IP is a reusable block of logic or circuit layout. With the exponential increase in technology and the growing complexity of camera systems, implementation issues and challenges have become increasingly demanding. The goal is for IPs to occupy as little space as possible, which involves reducing the technological node and, consequently, the size of the circuit, enabling operation at higher frequencies, lower power consumption, and optimal performance. This report covers all the physical implementation phases of a MIPI platform IP and the development of a new workflow/development methodology using a Synopsys tool with artificial intelligence, DSO.ai. To assess the advantages of the new tool, a comparison was made between the physical implementation of a 3nm C-PHY MIPI IP using the current methodology and the new one incorporating DSO.ai.
To achieve a clear and fluid image on a screen, the analogue information captured by an image sensor is processed and transmitted to a host processor. An extremely effective and efficient interface circuit is required to process the data. This circuit is called an IP from the MIPI platform (Mobile Industry Processor Interface). An IP is a reusable block of logic or circuit layout. With the exponential increase in technology and the growing complexity of camera systems, implementation issues and challenges have become increasingly demanding. The goal is for IPs to occupy as little space as possible, which involves reducing the technological node and, consequently, the size of the circuit, enabling operation at higher frequencies, lower power consumption, and optimal performance. This report covers all the physical implementation phases of a MIPI platform IP and the development of a new workflow/development methodology using a Synopsys tool with artificial intelligence, DSO.ai. To assess the advantages of the new tool, a comparison was made between the physical implementation of a 3nm C-PHY MIPI IP using the current methodology and the new one incorporating DSO.ai.
Description
Keywords
Physical Implementation 3 nm IP VLSI Artificial inteligence MIPI C-PHY Implementação física Inteligência artificial