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HopliteRT*: Real-Time NoC for FPGA

dc.contributor.authorRibot González, Yilian
dc.contributor.authorNelissen, Geoffrey
dc.date.accessioned2020-11-04T15:01:34Z
dc.date.embargo2120
dc.date.issued2020
dc.descriptionThis article was presented in part at the International Conference on Embedded Software 2020 and appears as part of the ESWEEK-TCAD special issue.pt_PT
dc.description.abstractWith the increasing number of computation nodes integrated in multi and many-core platforms, network-on-chips (NoCs) emerged as a new communication medium in systems-on-chips (SoCs). HopliteRT is a new NoC design that was recently proposed to address the needs of real-time systems whilst respecting the constraints of field-programmable gate array (FPGA) platforms. In this article, we: 1) introduce priority-based routing in HopliteRT; 2) change the network topology in order to improve the packets’ worst-case traversal time (WCTT); 3) identify a flaw in the existing timing analysis of HopliteRT; and 4) develop a new timing analysis that is proven correct. We also show by means of experiments that the modifications of HopliteRT proposed in this article allows for at least 2× improvement on the worst and average case traversal time of high priority packets, without impacting the quality of service of low-priority packets. The timing properties of high priority flows are greatly improved for negligible additional hardware costs. The proposed NoC has been implemented in Verilog and synthesized for a Xilinx Virtex-7 FPGA platform.pt_PT
dc.description.versioninfo:eu-repo/semantics/publishedVersionpt_PT
dc.identifier.doi10.1109/TCAD.2020.3012748pt_PT
dc.identifier.issn0278-0070
dc.identifier.urihttp://hdl.handle.net/10400.22/16428
dc.language.isoengpt_PT
dc.peerreviewedyespt_PT
dc.publisherInstitute of Electrical and Electronics Engineerspt_PT
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/9211415pt_PT
dc.subjectField programmable gate arraypt_PT
dc.subjectNetwork-onchipspt_PT
dc.subjectReal-time embedded systemspt_PT
dc.subjectSystems-on-chipspt_PT
dc.subjectTiming analysispt_PT
dc.titleHopliteRT*: Real-Time NoC for FPGApt_PT
dc.typejournal article
dspace.entity.typePublication
oaire.citation.endPage3661pt_PT
oaire.citation.issue11pt_PT
oaire.citation.startPage3650pt_PT
oaire.citation.titleIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systemspt_PT
oaire.citation.volume39pt_PT
person.familyNameRibot González
person.familyNameNelissen
person.givenNameYilian
person.givenNameGeoffrey
person.identifier.ciencia-idE51E-C723-0D77
person.identifier.orcid0000-0002-4089-7794
person.identifier.orcid0000-0003-4141-6718
person.identifier.scopus-author-id41561808600
rcaap.rightsclosedAccesspt_PT
rcaap.typearticlept_PT
relation.isAuthorOfPublication2738baf6-1d5f-44db-b199-75789aa83529
relation.isAuthorOfPublicatione23673cc-6b82-4d9c-94fb-4b4fca051b0d
relation.isAuthorOfPublication.latestForDiscoverye23673cc-6b82-4d9c-94fb-4b4fca051b0d

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