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Thermal-Aware Schedulability Analysis for Fixed-Priority Non-preemptive Real-Time Systems

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Technology advances in microprocessor design have resulted in high device density and performance during the last decades. More components are fabricated on the chip die and millions, if not billions, of instructions can now be executed within microseconds. A consequence of this advancement is heat dissipation by the microprocessors. In this context, elevated on-chip temperature issues have become an important subject for the design of future generations of microprocessors, especially in avionics and automotive industries. In this paper, we address the scheduling problem of non-preemptive periodic tasks on a single processor platform under thermal-aware design. We assume that the tasks are scheduled by following any Fixed-Task-Priority (FTP) scheduler (e.g., Rate Monotonic (RM) or Deadline Monotonic (DM)) and we propose a unique framework wherein we capture both the temporal and thermal behavior of the system. Then, we present two new thermal-aware scheduling strategies, referred to as NP-HBC and NP-CBH, to keep the system temperature within specified parameters and we derive their respective schedulability analysis. Finally, we evaluate the performance of the proposed theoretical results through intensive simulations.

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RTSS 2019 originally postponed from December 2019 (Hong-Kong) to February 2020 (York, UK) was cancelled.

Keywords

Logic design Microprocessor chips multiprocessing systems Power aware computing

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