Publication
Development of the trajectory planner and control system of a spherical robot manipulator embedded in a FPGA board
| dc.contributor.author | Filho, Ênio | |
| dc.contributor.author | Llanos Quintero, C H | |
| dc.contributor.author | Carvalho, G C de | |
| dc.date.accessioned | 2020-01-17T15:27:55Z | |
| dc.date.available | 2020-01-17T15:27:55Z | |
| dc.date.issued | 2019 | |
| dc.description | Best poster presentation Award | pt_PT |
| dc.description | 3rd Doctoral Congress in Engineering will be held at FEUP on the 27th to 28th of June, 2019 | pt_PT |
| dc.description.abstract | This work describes the development and implementation of a linear trajectory controller in a five degree of freedom (DOF) robot manipulator (Filho and Quintero 2013). An open loop control architecture was designed and embedded in a Field Programable Gate Array (FPGA), for the first threeDOF. In this paper, we present the direct and inverse kinematics and the Jacobian of the manipulator, used to extract the control equations of the system (Motta, Llanos-Quintero, and Coral Sampaio 2016). This model aims the trajectory planning in a rectilinear path, described in Cartesian Coordinates. For the control implementation embedded in the FPGA, was used the NIOS II microprocessor. This one is responsible for the path planning and for the speed control of the manipulator joints, with some accelerated functions in hardware. The validation of the equations and path planning were done using software simulation. The final structure and experiments of the manipulator are also presented. | pt_PT |
| dc.description.version | info:eu-repo/semantics/publishedVersion | pt_PT |
| dc.identifier.uri | http://hdl.handle.net/10400.22/15310 | |
| dc.language.iso | eng | pt_PT |
| dc.subject | Robotics | pt_PT |
| dc.subject | FPGA | pt_PT |
| dc.subject | Manipulators | pt_PT |
| dc.subject | Embedded Circuits | pt_PT |
| dc.subject | Kinematics | pt_PT |
| dc.title | Development of the trajectory planner and control system of a spherical robot manipulator embedded in a FPGA board | pt_PT |
| dc.type | other | |
| dspace.entity.type | Publication | |
| oaire.citation.conferencePlace | Porto, Portugal | pt_PT |
| oaire.citation.title | Proceedings of the 3rd Doctoral Congress in Engineering (DCE 2019) | pt_PT |
| rcaap.rights | openAccess | pt_PT |
| rcaap.type | other | pt_PT |
Files
License bundle
1 - 1 of 1
No Thumbnail Available
- Name:
- license.txt
- Size:
- 1.71 KB
- Format:
- Item-specific license agreed upon to submission
- Description: