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Advisor(s)
Abstract(s)
The demand for extra functionality in modern applications
is a never ending trend. The hardware vendors are actively improving
the design of processors to accommodate these complex
applications. The increase in clock speed to enhance the
performance of the processor has hit its limits. This is driven
by the fact that the performance per watt became costly at high
frequencies. Hence, Moore’s law is no longer sustained with
increasing frequencies but with additional cores [1]. Therefore,
in the last decade, the semiconductor industry has experienced
a paradigm shift from single processor design to multicore
processors (MCP). Cores in MCP share many resources like
caches, main memory, I/O devices and interconnects. This
sharing, which does not exist in single core processors, makes
the temporal behavior of MCPs rather complex and highly
unpredictable as these platforms are designed to improve the
average-case performance. Consequently, their use in safetycritical
applications such as avionics domain is extremely
challenging. The certification authorities are very skeptical in
the use of MCP platforms in avionics applications
Description
Work in Progress Session, 21st IEEE Real-Time and Embedded Techonology and Applications Symposium (RTAS 2015). 13 to 16, Apr, 2015, pp 27-28. Seattle, U.S.A..