Publication
An Enhanced WLAN Security System With FPGA Implementation for Multimedia Applications
| dc.contributor.author | Hayajneh, Thaier | |
| dc.contributor.author | Ullah, Sana | |
| dc.contributor.author | Mohd, Bassam J. | |
| dc.contributor.author | Balagani, Kiran S. | |
| dc.date.accessioned | 2015-10-16T11:08:00Z | |
| dc.date.available | 2015-10-16T11:08:00Z | |
| dc.date.issued | 2015 | |
| dc.description.abstract | Maintaining a high level of data security with a low impact on system performance is more challenging in wireless multimedia applications. Protocols that are used for wireless local area network (WLAN) security are known to significantly degrade performance. In this paper, we propose an enhanced security system for a WLAN. Our new design aims to decrease the processing delay and increase both the speed and throughput of the system, thereby making it more efficient for multimedia applications. Our design is based on the idea of offloading computationally intensive encryption and authentication services to the end systems’ CPUs. The security operations are performed by the hosts’ central processor (which is usually a powerful processor) before delivering the data to a wireless card (which usually has a low-performance processor). By adopting this design, we show that both the delay and the jitter are significantly reduced. At the access point, we improve the performance of network processing hardware for real-time cryptographic processing by using a specialized processor implemented with field-programmable gate array technology. Furthermore, we use enhanced techniques to implement the Counter (CTR) Mode with Cipher Block Chaining Message Authentication Code Protocol (CCMP) and the CTR protocol. Our experiments show that it requires timing in the range of 20–40 μs to perform data encryption and authentication on different end-host CPUs (e.g., Intel Core i5, i7, and AMD 6-Core) as compared with 10–50 ms when performed using the wireless card. Furthermore, when compared with the standard WiFi protected access II (WPA2), results show that our proposed security system improved the speed to up to 3.7 times. | pt_PT |
| dc.identifier.doi | 10.1109/JSYST.2015.2424702 | |
| dc.identifier.uri | http://hdl.handle.net/10400.22/6712 | |
| dc.language.iso | eng | pt_PT |
| dc.peerreviewed | yes | pt_PT |
| dc.publisher | IEEE | pt_PT |
| dc.relation.ispartofseries | IEEE Systems Journal; | |
| dc.relation.publisherversion | http://ieeexplore.ieee.org/stamp/stamp.jsp?arnumber=7104061 | pt_PT |
| dc.subject | Field-programmable gate array (FPGA) | pt_PT |
| dc.subject | IEEE 802.11i | pt_PT |
| dc.subject | Multimedia security | pt_PT |
| dc.subject | Wireless local area network (WLAN) | pt_PT |
| dc.subject | WiFi protected access II (WPA2) | pt_PT |
| dc.title | An Enhanced WLAN Security System With FPGA Implementation for Multimedia Applications | pt_PT |
| dc.type | journal article | |
| dspace.entity.type | Publication | |
| oaire.citation.title | IEEE SYSTEMS JOURNAL | pt_PT |
| rcaap.rights | closedAccess | pt_PT |
| rcaap.type | article | pt_PT |