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Design and implementation of an FPGA-based NoC for Real Time Systems

dc.contributor.authorRibot, Yilian
dc.contributor.authorNelissen, Geoffrey
dc.date.accessioned2020-01-16T15:54:05Z
dc.date.available2020-01-16T15:54:05Z
dc.date.issued2019
dc.description.abstractIn order to communicate, cores of a multi-core platform traditionally relied on shared busses. However, with the increasing number of computation nodes integrated in multi- and many-core platforms, Network-on-Chips (NoCs) emerged as a new alternative communication medium in Systems-on-Chips (SoCs). Hoplite-RT is a new NoC design that was recently proposed. Hoplite-RT is a compact design easy to analyze and with a low-cost implementation that was specifically tailored for FPGA. In this work, we introduce priority-based routing to Hoplite-RT and change the network topology so as to improve its timing behavior, i.e., its Worst-Case Traversal Time (WCTT).pt_PT
dc.description.versioninfo:eu-repo/semantics/publishedVersionpt_PT
dc.identifier.urihttp://hdl.handle.net/10400.22/15294
dc.language.isoengpt_PT
dc.peerreviewedyespt_PT
dc.relationPReFECT, ref. POCI-01-0145-FEDER-029119pt_PT
dc.relation.publisherversionhttps://www.ecrts.org/archives/fileadmin/WebsitesArchiv/ecrts2019/wp-content/uploads/2019/06/ECRTS2019-WIP-proceedings.pdfpt_PT
dc.subjectFPGApt_PT
dc.subjectWCTTpt_PT
dc.titleDesign and implementation of an FPGA-based NoC for Real Time Systemspt_PT
dc.typeconference object
dspace.entity.typePublication
oaire.citation.endPage3pt_PT
oaire.citation.startPage1pt_PT
oaire.citation.titleProceedings of the Work-in-Progress Session (ECRTS 2019)pt_PT
person.familyNameNelissen
person.givenNameGeoffrey
person.identifier.ciencia-idE51E-C723-0D77
person.identifier.orcid0000-0003-4141-6718
person.identifier.scopus-author-id41561808600
rcaap.rightsopenAccesspt_PT
rcaap.typeconferenceObjectpt_PT
relation.isAuthorOfPublicatione23673cc-6b82-4d9c-94fb-4b4fca051b0d
relation.isAuthorOfPublication.latestForDiscoverye23673cc-6b82-4d9c-94fb-4b4fca051b0d

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