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Advanced Three-Phase Grid Synchronization Using Synchronous Reference Frame Phase-Locked Loops

dc.contributor.advisorBrito, Rui Miguel Monteiro de
dc.contributor.authorSilva, José Eduardo Santos Maravalhas
dc.date.accessioned2019-12-05T12:08:35Z
dc.date.available2019-12-05T12:08:35Z
dc.date.issued2019
dc.description.abstractModern power electronics devices require grid synchronization to accurately time the switching of their semiconductor devices. This project steps through the development of such an algorithm for three-phase grids. The classical synchronous reference frame phase-locked loop is studied in depth, including a detailed analysis of the transforms that give rise to its name. A few improvements are added in order to mitigate some of the well-known pitfalls of this method. Using the theory of symmetrical sequence components, new equations that describe the behaviour of said components in relation to unbalanced three-phase voltages are derived. These equations are then used to better understand the behaviour of the classical algorithm under unbalanced conditions. From this, an advanced grid synchronization algorithm based on multiple phase-locked loops is developed. This algorithm is then discretized and implemented in a typical microcontroller. Finally, a custom genetic algorithm is used to fine-tune the parameters of the algorithm to a specific simulated scenario meant to represent harsh grid conditions.pt_PT
dc.identifier.tid202296040pt_PT
dc.identifier.urihttp://hdl.handle.net/10400.22/15036
dc.language.isoengpt_PT
dc.subjectSRF-PLLpt_PT
dc.subjectPLLpt_PT
dc.subjectThree-Phasept_PT
dc.subjectGridpt_PT
dc.subjectPower Electronicspt_PT
dc.titleAdvanced Three-Phase Grid Synchronization Using Synchronous Reference Frame Phase-Locked Loopspt_PT
dc.typemaster thesis
dspace.entity.typePublication
rcaap.rightsopenAccesspt_PT
rcaap.typemasterThesispt_PT
thesis.degree.nameMestrado em Engenharia Eletrotécnica e de Computadores - Sistemas Autónomospt_PT

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