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Reliability and availability in reconfigurable computing: a basis for a common solution

dc.contributor.authorGericota, Manuel G.
dc.contributor.authorAlves, Gustavo R.
dc.contributor.authorSilva, Miguel L.
dc.contributor.authorFerreira, José M.
dc.date.accessioned2014-06-02T14:36:17Z
dc.date.available2014-06-02T14:36:17Z
dc.date.issued2008
dc.description.abstractDynamically reconfigurable SRAM-based field-programmable gate arrays (FPGAs) enable the implementation of reconfigurable computing systems where several applications may be run simultaneously, sharing the available resources according to their own immediate functional requirements. To exclude malfunctioning due to faulty elements, the reliability of all FPGA resources must be guaranteed. Since resource allocation takes place asynchronously, an online structural test scheme is the only way of ensuring reliable system operation. On the other hand, this test scheme should not disturb the operation of the circuit, otherwise availability would be compromised. System performance is also influenced by the efficiency of the management strategies that must be able to dynamically allocate enough resources when requested by each application. As those resources are allocated and later released, many small free resource blocks are created, which are left unused due to performance and routing restrictions. To avoid wasting logic resources, the FPGA logic space must be defragmented regularly. This paper presents a non-intrusive active replication procedure that supports the proposed test methodology and the implementation of defragmentation strategies, assuring both the availability of resources and their perfect working condition, without disturbing system operation.por
dc.identifier.doi10.1109/TVLSI.2008.2001141pt_PT
dc.identifier.issn1063-8210
dc.identifier.urihttp://hdl.handle.net/10400.22/4441
dc.language.isoengpor
dc.peerreviewedyespor
dc.publisherIEEEpor
dc.relation.ispartofseriesVery Large Scale Integration; Vol. 16, Issue 11
dc.relation.publisherversionhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=4655626por
dc.titleReliability and availability in reconfigurable computing: a basis for a common solutionpor
dc.typejournal article
dspace.entity.typePublication
oaire.citation.endPage1558por
oaire.citation.issueIssue 11por
oaire.citation.startPage1545por
oaire.citation.titleIEEE Transactions on Very Large Scale Integration (VLSI) Systemspor
oaire.citation.volumeVol. 16por
person.familyNameGericota
person.familyNameAlves
person.givenNameManuel
person.givenNameGustavo
person.identifier150015
person.identifier.ciencia-idCE13-92FF-2097
person.identifier.ciencia-id4210-4DF2-5206
person.identifier.orcid0000-0001-9774-816X
person.identifier.orcid0000-0002-1244-8502
person.identifier.ridI-7876-2014
person.identifier.scopus-author-id7006053908
rcaap.rightsclosedAccesspor
rcaap.typearticlepor
relation.isAuthorOfPublicationc84c77d9-ad89-48d1-9901-de8d5f7300b5
relation.isAuthorOfPublication01800568-7eaf-41d9-b78d-cf64f7c7381d
relation.isAuthorOfPublication.latestForDiscoveryc84c77d9-ad89-48d1-9901-de8d5f7300b5

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