Publication
A tighter analysis of the worst-case endto- end communication delay in massive multicores
| dc.contributor.author | Nélis, Vincent | |
| dc.contributor.author | Dasari, Dakshina | |
| dc.contributor.author | Nikolic, Borislav | |
| dc.contributor.author | Petters, Stefan M. | |
| dc.date.accessioned | 2014-02-07T14:53:21Z | |
| dc.date.available | 2014-02-07T14:53:21Z | |
| dc.date.issued | 2011 | |
| dc.description.abstract | "Many-core” systems based on the Network-on- Chip (NoC) architecture have brought into the fore-front various opportunities and challenges for the deployment of real-time systems. Such real-time systems need timing guarantees to be fulfilled. Therefore, calculating upper-bounds on the end-to-end communication delay between system components is of primary interest. In this work, we identify the limitations of an existing approach proposed by [1] and propose different techniques to overcome these limitations. | por |
| dc.identifier.uri | http://hdl.handle.net/10400.22/3798 | |
| dc.language.iso | eng | por |
| dc.peerreviewed | no | por |
| dc.publisher | IPP-Hurray Group | por |
| dc.relation.publisherversion | http://www.cister.isep.ipp.pt/docs/ | por |
| dc.title | A tighter analysis of the worst-case endto- end communication delay in massive multicores | por |
| dc.type | report | |
| dspace.entity.type | Publication | |
| oaire.citation.endPage | 6 | por |
| oaire.citation.startPage | 1 | por |
| rcaap.rights | openAccess | por |
| rcaap.type | report | por |