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Job phasing aware preemption deferral

dc.contributor.authorMarinho, José
dc.contributor.authorPetters, Stefan M.
dc.date.accessioned2014-02-07T11:19:58Z
dc.date.available2014-02-07T11:19:58Z
dc.date.issued2011
dc.description.abstractPreemptions account for a non-negligible overhead during system execution. There has been substantial amount of research on estimating the delay incurred due to the loss of working sets in the processor state (caches, registers, TLBs) and some on avoiding preemptions, or limiting the preemption cost. We present an algorithm to reduce preemptions by further delaying the start of execution of high priority tasks in fixed priority scheduling. Our approaches take advantage of the floating non-preemptive regions model and exploit the fact that, during the schedule, the relative task phasing will differ from the worst-case scenario in terms of admissible preemption deferral. Furthermore, approximations to reduce the complexity of the proposed approach are presented. Substantial set of experiments demonstrate that the approach and approximations improve over existing work, in particular for the case of high utilisation systems, where savings of up to 22% on the number of preemption are attained.por
dc.identifier.doi10.1109/RTAS.2011.30pt_PT
dc.identifier.isbn978-1-4577-1822-9
dc.identifier.urihttp://hdl.handle.net/10400.22/3778
dc.language.isoengpor
dc.peerreviewedyespor
dc.publisherIEEEpor
dc.relation.ispartofseriesEmbedded and Ubiquitous Computing (EUC);
dc.relation.publisherversionhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6104517por
dc.titleJob phasing aware preemption deferralpor
dc.typejournal article
dspace.entity.typePublication
oaire.citation.conferencePlaceMelbourne, VICpor
oaire.citation.endPage135por
oaire.citation.startPage128por
oaire.citation.titleIFIP 9th International Conference on Embedded and Ubiquitous Computing (EUC) 2011por
rcaap.rightsopenAccesspor
rcaap.typearticlepor

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