Hussain, IshfaqAli Murtza, ShahidYasir Qadri, MuhammadFleury, MartinN. Qadri, Nadia2020-10-3020190045-7906http://hdl.handle.net/10400.22/16380This paper demonstrates that interval type-2 Fuzzy Logic Systems (FLS’s) are suited to Multiprocessor System-on-a-Chip (MPSoC) design modeling because of their ability to handle the uncertainty associated with input parameters. This makes for a scalable modeling process, whereas prior usage of type-1 FLS’s for modeling inhibited scalability. Specifically, the paper proposes a type-2 Takagi Sugeno Kang (TSK) FLS for modeling MPSoCs built around a multicore processor with shared memory. The paper also presents a TSK FLS reconfiguration methodology in order to dynamically reduce the energy consumption of such a multiprocessor. Modeling of MPSoC’s by means of the type-2 TSK FLS was found to be effective in terms of a reduction in the Energy Delay Product when applied to five large-scale numerical processing applications on an MPSoC. In fact, experimental results show a significant reduction (by 87–93% across the applications) in the energy consumption of an MPSoC.engDesign space explorationMultiprocessor System-on-a-ChipMulticore processorType 2 Fuzzy Logic SystemReconfigurationjournal article10.1016/j.compeleceng.2019.01.015