Gericota, Manuel G.Alves, Gustavo R.Silva, Miguel L.Ferreira, J. M. Martins2017-03-282017-03-282001-05http://hdl.handle.net/10400.22/9716A new class of FPGAs that enable partial and dynamic reconfiguration without disturbing system operation, raised a new test challenge: how to assure a continuously fault free operation, independently of the circuit present after many reconfiguration processes. A new on-line test method for those FPGAs is proposed, based on a scanning methodology and in the reuse of the IEEE 1149.1 Boundary Scan test infrastructure, already widely employed for In-System Programming.engFPGAsjournal article