Reis, CecíliaTenreiro Machado, J. A.Cunha, J. Boaventura2019-04-092019-04-092004http://hdl.handle.net/10400.22/13499This paper proposes a genetic algorithm for designing combinational logic circuits and studies four different case examples: 2-to-1 multiplexer, one-bit full adder, four-bit parity checker and a two-bit multiplier. The objective of this work is to generate a functional circuit with the minium number of gates.engCircuit designCombinational circuitsGenetic algorithmsComputer-aided designjournal article10.20965/JACIII.2001.p0279