Fidalgo, AndréAlves, Gustavo R.Ferreira, José M.2014-07-032014-07-0320061-4244-0185-2http://hdl.handle.net/10400.22/4648Fault injection is frequently used for the verification and validation of the fault tolerant features of microprocessors. This paper proposes the modification of a common on-chip debugging (OCD) infrastructure to add fault injection capabilities and improve performance. The proposed solution imposes a very low logic overhead and provides a flexible and efficient mechanism for the execution of fault injection campaigns, being applicable to different target system architectures.engconference object10.1109/DDECS.2006.1649607