Utilize este identificador para referenciar este registo: http://hdl.handle.net/10400.22/6816
Registo completo
Campo DCValorIdioma
dc.contributor.authorPedro, André-
dc.contributor.authorPereira, David-
dc.contributor.authorPinho, Luís Miguel-
dc.contributor.authorPinto, Jorge Sousa-
dc.date.accessioned2015-11-04T15:21:58Z-
dc.date.available2015-11-04T15:21:58Z-
dc.date.issued2015-02-
dc.identifier.urihttp://hdl.handle.net/10400.22/6816-
dc.description.abstractOver the past decades several approaches for schedulability analysis have been proposed for both uni-processor and multi-processor real-time systems. Although different techniques are employed, very little has been put forward in using formal specifications, with the consequent possibility for mis-interpretations or ambiguities in the problem statement. Using a logic based approach to schedulability analysis in the design of hard real-time systems eases the synthesis of correct-by-construction procedures for both static and dynamic verification processes. In this paper we propose a novel approach to schedulability analysis based on a timed temporal logic with time durations. Our approach subsumes classical methods for uni-processor scheduling analysis over compositional resource models by providing the developer with counter-examples, and by ruling out schedules that cause unsafe violations on the system. We also provide an example showing the effectiveness of our proposal.pt_PT
dc.language.isoengpt_PT
dc.publisherACMpt_PT
dc.relationFCOMP-01-0124-FEDER-022701 (CISTER)pt_PT
dc.relationFCOMP- 01-0124-FEDER-015006 (VIPCORE)pt_PT
dc.relationFCOMP-01-0124- FEDER-020486 (AVIACC)pt_PT
dc.relation.ispartofseriesACM SIGBED Review;Vol. 12, Issue 1-
dc.rightsopenAccesspt_PT
dc.subjectTemporal logicpt_PT
dc.subjectSchedulability analysispt_PT
dc.subjectCompositionalpt_PT
dc.subjectHard Real-Time Systemspt_PT
dc.subjectEmbedded Systemspt_PT
dc.titleLogic-based schedulability analysis for compositional hard real-time embedded systemspt_PT
dc.typearticlept_PT
dc.peerreviewedyespt_PT
degois.publication.firstPage56pt_PT
degois.publication.issue1pt_PT
degois.publication.lastPage64pt_PT
degois.publication.titleACM SIGBED Review - Special Issue on the 6th International Workshop on Compositional Theory and Technology for Real-Time Embedded Systemspt_PT
degois.publication.volume12pt_PT
dc.relation.publisherversionhttp://dl.acm.org/citation.cfm?doid=2752801.2752808pt_PT
dc.identifier.doi10.1145/2752801.2752808-
Aparece nas colecções:ISEP – CISTER – Artigos

Ficheiros deste registo:
Ficheiro Descrição TamanhoFormato 
ART_CISTER_2015_matos_pedro.pdf1,06 MBAdobe PDFVer/Abrir    Acesso Restrito. Solicitar cópia ao autor!


FacebookTwitterDeliciousLinkedInDiggGoogle BookmarksMySpace
Formato BibTex MendeleyEndnote 

Todos os registos no repositório estão protegidos por leis de copyright, com todos os direitos reservados.